Automatic article sorting and punching machine

ABSTRACT

An automatic sorting machine for automatically sorting record receivers according to the elapsed time data printed thereon and for automatically punching the record receivers in accordance with printed time of day data appearing on the receivers. The machine includes apparatus for serially feeding record receivers to a scanning station having three scanning heads mounted to scan and convert printed data into radiant energy pulses that are representations of the data. The pulses are sensed and converted to elapsed time and time of day BCD (Binary Coded Decimal) representations. The elapsed time BCD representations are applied as inputs to elapsed time error checking and correction logic which automatically corrects for error appearing in the printed data on the record receiver to generate elapsed time signals. The elapsed time signals are applied by electronics to selectively operate gate solenoids related to specific record receiver storage bins in the sorting machine. The time of day BCD representations are applied as inputs to time of day error checking and correction logic which provides time of day signals corrected as stated above to selectively energize punch solenoids. The punch solenoids are energized by the signals while the record receivers are at the scanning station after which the record receivers are released to be automatically transported by the machine and stored in the bins selected by the elapsed time data. All logic is automatically restored in timed sequence with machines&#39;&#39; rate capability for storing documents.

United States Patent [191 Dillard et al.

[Ill 3,896,300

[ July 22,1975

[ AUTOMATIC ARTICLE SORTING AND PUNCHING MACHINE [75] Inventors: John W.Dillard; Dominick Tringali;

Richard L. Swartz; Ernest M. Hinson, .lr., all of Columbia. SC.

[73] Assignee: Universal Business Machines, lnc.,

Columbia. SC.

[22} Filed: June l5, I973 [2]) Appl. No.: 370,530

Related US. Application Data [62] Division of Ser. No. 135.656, April20. l97l, Pat.

I52] U.S. Cl. 235/153 R; 235/6l.6 B [5]) Int. Cl 606i 11/00; 006k 5/00[58] Field of Search... 235/l53 R, 153 AP, I53 BB, 235/6l.6 R, 61.6 B.6L6 J, 61.7 R; 340/l46.l AG, l46.l R

Primary ExaminerCharles E. Atkinson Attorney, Agent. or Firm-Kemon,Palmer and Estabrook 8; (FE Ml mun mums attention ms in. is, 20, 2| Z2]ELAPSED llllIlES 5m, (IEMTERS [57] ABSTRACT An automatic sorting machinefor automatically sorting record receivers according to the elapsed timedata printed thereon and for automatically punching the record receiversin accordance with printed time of day data appearing on the receivers.The machine includes apparatus for serially feeding record receivers toa scanning station having three scanning heads mounted to scan andconvert printed data into radiant energy pulses that are representationsof the data. The pulses are sensed and converted to elapsed time andtime of day BCD (Binary Coded Decimal) representations. The elapsed timeBCD representations are applied as inputs to elapsed time error checkingand correction logic which automatically corrects for error appearing inthe printed data on the record receiver to generate elapsed timesignals. The elapsed time signals are applied by electronics toselectively operate gate solenoids related to specific record receiverstorage bins in the sorting machine. The time of day BCD representationsare applied as inputs to time of day error checking and correction logicwhich provides time of day signals corrected as stated above toselectively energize punch solenoids. The punch solenoids are energizedby the signals while the record receivers are at the scanning stationafter which the record receivers are released tobe automaticallytransported by the machine and stored in the bins selected by theelapsed time data. All logic is automatically restored in timed sequencewith machines rate capability for storing documents.

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AUTOMATIC ARTICLE SORTING AND PUNCHING MACHINE This is a DivisionalApplication of Scr. No. 135.656 filed Apr. 20. I97] and now US Pat. No.3.767113.

FIELD OF THE INVENTION This invention relates to automatic documentsorting machines having the capability of retrieving data from a recordreceiver and automatically transporting the record receiver to adocument storage bin or location assigned to the data in the machine.The invention also relates to machines of the aforementioned type thathave the additional capability for automatically punching a recordreceiver in accordance with data recorded on the receiver.

BACKGROUND OF THE INVENTION I. The Problem For many years telephoneoperating companies have used record receivers in card form for thepurpose of providing records of the time of day that toll calls arecommenced and records of the elapsed time for each such call. The recordis usually made with a Calculagraph (registered trademark of theCalculagraph Company, Harrison. NJ.) by a telephone operator. Telephonecompany personnel thereafter visually read the printed data to determinethe time of each call and its duration. The toll cards are thereaftermarked to show total elapsed time of a call. The cards are then manuallysorted into groups where a group differs from the preceding elapsed timegroup by a factor of l minute, cg. all cards showing an elapsed time inthe range 6 seconds through 1 minute seconds are collected as a firstgroup; those cards showing elapsed time in a range of l minute 16seconds to 2 minutes l5 seconds are collected in a second group. etc.Thereafter. a lead card i.e.. a card that is prepunched with a specificelapsed time. is made the first card in each group. For example, a cardprepunchcd with an elapsed time of 1 minute may be placed as the firstcard of the group of cards for the range 6 seconds l minute. l5 seconds,and a card prepunched for 2 minutes may be placed as the first card ofthe second group and so forth.

It should be noted that each card was provided with data at the placingof the call indicating the calling and called numbers and such otherindividual identification data as was appropriate.

The groups of sorted cards are thereafter used by automatic accountingmachinery for at least the purpose of computing customers statements.

From the preceding discussion. it should be apparent that much saving inthe way of labor and operating costs can he realized if the toll cardsare softed automatically. Further savings can he realized if they areautomatically perforated in accordance with the time of day 2. Prior ArtThe known prior art comprises machines capable of responding to machinelanguage for the purpose of automatically sorting documents such ascards to storage bins or locations. The sorting machines are usuallyprovided with a document conveying trackway or guideway along which aredisposed at number of document storage bins. Movable gates are usuallypositioned along the trackway adjacent to the storage bins. and usuallyeffective when opened to deflect a document from the trackway into abin. It is also common prao tice to associate a gate operating solenoidwith each gate such that the gate is opened when the solenoid isenergized.

Known prior art machines usually provide some form of reader andassociated circuitry for detecting data carried by the document and forprocessing the data so as to selectively energize a gate solenoid. Inthe general case. magnetically coded data in binary form carried by thedocuments is read and inputted to a buffer storage Logic is employed torespond to the storage s outputs so as to energize a gate solenoid.Usually timing means are employed to relate machine sorting speed tocircuit speed. An example of this art is represented by the teaching ofU.S. Pat. No. 3.246.751. it has also been taught that characterrecognition apparatus may be employed to read numeric data appearing ondocuments. see U.S. Pat. No. 3,052.350. These machines are said to beemployed to sort bank checks or mail.

In addition, it is known to associate a keyboard. operated punch to asorting machine. see U.S. Pat. No. 2,745,493.

Finally. there is a suggestion in U.Sv Pat. No. 103L135 that a flyingspot scanner and associated circuitry may be employed to retrieveelapsed time data from a telephone toll card and be used by autilization circuit. It is therein stated that the utilization circuitmay be a card punch device for punching an information card in themanner known in the art."

It is the principal object of this invention to provide new and usefulapparatus that automatically controls the operation of a sorting machineand punch in response to data represented by the angular relationship ofmarks on record receivers.

It is an object of this invention to provide new and useful controlapparatus for a document punch which apparatus is automaticallyresponsive to data relating to time and represented by the angularseparation of scanning marks on documents presented to the punch. Theseand other objects will be apparent from the following detaileddescription when read in conjunction with the attached drawings inwhich:

FIG. I is a side elevation of the overall machine;

FIG. 2 is a top plan view of the machine of FIG, 1;

FIG. 3 is a schematic of the scanning station;

FIGS. 4 and 4a show a card of the type used in the present invention;

FIG. 5 is a block diagram of the complete electronics of the invention;

FIGS. 6-8 are wiring diagrams of the machine panel controls;

FIG. 9 is a timing diagram of the machine operation;

FIG. 10 is a schematic diagram ofthe function generator;

FIGS. Ila and [lb are schematic diagrams of the photocell detectoramplifiers and control pulse formen;

FIG. 12 is a schematic diagram of a transponder pulse amplifier;

FIG. I3 is a schematic diagram of a pretime pulse generator;

FIG. I4 is a schematic diagram of the elapsed time gates and counters;

FIG. 15 is a composite block diagram of the elapsed time logic of FIG.5;

FIGS. 16-24 show circuits of FIG. 15 shown as on cards used in themachine;

1. An error checking and correction circuit for use with documentcontrol apparatus, the apparatus being responsive to at least two humanreadable recordings of time carried by a document to effect an operationon the document, one of the recordings being of values of greatersignificance than the other recording and the range of the recording ofvalues of lesser significance includes at least all such values as areencompassed by at least one complete unit value of the most significantvalues, the circuit comprising: first time signal generator meansresponsive at least in part to a digital signal which is representativeof the recording having greatest value significance applied to inputs ofthe said means to generate a time signal unique to such value; secondtime signal generator means responsive at least in part to a digitalsignal which is representative of the recording having lesser valuesignificance to generate at least a first or second error checking andcorrection signal; and comparator means responsive to said time signaland to said error checking and correction signal to provide a circuitoutput.
 2. An error checking and correction circuit according to claim 1wherein the range of the recording of values of lesser significanceincludes at least all such values as are encompassed by at least twocomplete unit values of the most significant values, and wherein thesecond time signal generator means includes: first circuit meansresponsive to an electrical representation of a recording in the firsthalf of the range of lesser significant values to generate the firsterror checking and corRection signal as a first set of signals, andsecond circuit means responsive to an electrical representation of arecording in the last half of the range of lesser significant values togenerate the second error checking and correction signal as a second setof signals.
 3. An error checking and comparison circuit according toclaim 2 wherein the comparator means includes: first circuit logic meansresponsive to a time signal for an even value and to said first set oferror checking and correction signals to provide the time signal as anuncorrected circuit output or responsive to a time signal for an oddvalue and said first set of error checking and correction signals toprovide a corrected circuit output; and second circuit means responsiveto a time signal for an odd value and to said second set of errorchecking and correction signals to provide the time signal as anuncorrected circuit output, and responsive to a time signal for an evenvalue and to said second set of error checking and correction signals toprovide a corrected circuit output.
 4. An error checking and correctioncircuit for use with control apparatus for an automatic document sortingmachine, the apparatus being responsive to at least two recordings ofelapsed time carried by a document to effect automatic sorting of thedocument, one of the two said recordings being of values of greatersignificance than the other, and the range of the recording in values oflesser significance including at least all such values as areencompassed by at least two units of the most significant value, theerror checking and correction circuit comprising: elapsed time signalgenerator means responsive to an electrical representation of therecording having greatest value significance for generating an elapsedtime signal unique for such value; second elapsed time signal generatormeans responsive to an electrical representation of the recording havinglesser value significance to generate a first set of error checking andcorrection signals if said recording is in the first half of its rangeand to generate a second set of error checking and correction signals ifthe recording is in the second half of its range; and comparator meansresponsive exclusively to the elapsed time signal and the first set oferror checking and correction signals to provide the elapsed time signalas a circuit output when the said signal represents an even value and toprovide a corrected circuit output signal when the elapsed time signalrepresents an odd value, OR exclusively to the elapsed time signal andthe second set of error checking and correction signals to provide theelapsed time signal as a circuit output when the said signal representsan odd value and to provide a corrected circuit output signal when theelapsed time signal represents an even value.
 5. An error checking andcorrection system according to claim 4 wherein the second elapsed timesignal generator means comprises: first and second logic circuit meansresponsive to electrical representations of recordings in the first andsecond quarters of the range to provide one of the signals of the firstset of signals, and a third logic circuit means responsive to outputs ofsaid first or second logic circuit means to provide the other of thesignals in said first set of signals; and fourth and fifth logic circuitmeans responsive to electrical representations of recordings in thethird and fourth quarters of the range to provide one of the signals ofthe second set of signals, and a sixth logic circuit means responsive tooutputs of said fourth or fifth logic circuit means to provide the otherof said signals in the second set of signals.
 6. An error checking andcorrection circuit for use with control apparatus for an automaticdocument marking machine, the apparatus being responsive to at least tworecordings of time carried by a document to effect an automatic markingof the document in machine readable form at coded locatioNs on thedocument, one of the two said recordings being of time units of greatersignificance, than the other, and the other recording including a rangeof units encompassing one complete unit of the units of greatersignificance; the error checking and correction circuit including: timesignal generator means responsive at least to an electricalrepresentation for any recording in units of greatest significance togenerate a time signal unique to the unit value represented by therecording; second time signal generator means effective to output atleast a first signal representing no error and responsive to thesimultaneous presence of an electrical representation of the recordinghaving lesser value significance and an electrical representationobtained from the recording of greater significance and representing afraction of the unit value of such recording to generate at least oneerror signal; and comparator means responsive to the simultaneouspresence of the time signal and said first signal to provide said timesignal as first exclusive output of the circuit, the said comparatormeans being responsive to said time signal and to said error signal toprovide a second output of the circuit, the second output representing avalue different from the time signal and being exclusive of said firstexclusive output.
 7. An error checking and correction circuit accordingto claim 6 wherein the second time signal generator means includes: atleast first and second time signal generators each normally beingeffective to output individual first signals of the type characterized;and, each said time signal generator being responsive to electricalrepresentations representing recordings in predetermined and differentportions of the range for the lesser values, and responsive toelectrical representations obtained from the recordings of greatersignificance and representing different ranges of fractions of the unitvalues of such recordings such that each said time signal generator iseffective to provide an error signal.
 8. An error checking andcorrection circuit according to claim 7 wherein said comparator meansincludes: EXCLUSIVE OR output means connected to respond to thesimultaneous presence of a time signal and the first signals from saidfirst and second time generators to effect an output from said EXCLUSIVEOR means representative of said time signals; second logic circuit meansconnected to be simultaneously responsive to a time signal of differentvalue than that applied to the first circuit means with an error signaloutput of said first generator to effect an output from said EXCLUSIVEOR means; and, third logic circuit means connected to be simultaneouslyresponsive to a third time signal representing a value different fromthat applied to said first and second logic circuits with an errorsignal from said second time generator to effect an output from saidEXCLUSIVE OR means, the output of said EXCLUSIVE OR means in each casebeing a circuit output indicative of the unit value of time representedby the time signal applied to the first logic circuit means.
 9. An errorchecking and correction circuit according to claim 7 wherein the timesignal generator means includes circuit means responsive on a firstinput to an electrical representation for a recording of a unit ofgreatest significance simultaneously with the presence on a second inputof an electrical representation representing a recording within a rangeof values of lesser significance to generate on an output a time signalunique to a unit value different from the value represented by theelectrical representation on the first input to the circuit.